In the process of manufacturing integrated circuit chips, exposure and transfer (lithography) of a designed pattern for a chip on photoresist on a wafer surface is one of the most important steps which is implemented by an apparatus called lithographic apparatus (exposure device). The resolution and exposure efficiency of a lithographic apparatus greatly influence the characteristic linewidth (resolution) and productivity of IC chips. The motion accuracy and operation efficiency of an ultraprecise wafer moving and positioning system (hereinafter referred to as wafer stage), which is a critical system of lithographic apparatus, determine to a large extent the resolution and exposure efficiency of a lithographic apparatus.
The fundamental principle of a step-and-scan projection lithographic apparatus is shown in FIG. 1. Deep ultraviolet light from a light source 45 transmits through a mask 47 and a lens system 49 to image a part of pattern on the mask onto certain chip of a wafer 50. The mask and the wafer move synchronously in opposite directions with a certain velocity ratio so as to image the entire pattern on the mask onto the certain chip on the wafer.
The basic function of a wafer moving and positioning system is to carry a wafer and move at a preset speed and in a preset direction during exposure to allow precise transfer of a mask pattern to various areas on the wafer. Due to the small linewidth of chips (the smallest linewidth of 45 nm available presently), it is required that the wafer stage has extremely high moving and positioning accuracy in order to ensure overlay accuracy and resolution of lithography. Furthermore, since the movement velocity of wafer stage influences to a large extent the productivity of lithography, it is desired to further increase movement velocity of the wafer stage from the view point of increasing productivity.
For traditional wafer stages, such as those described in patents EP 0729073 and U.S. Pat. No. 5,996,437, only one wafer moving and positioning unit, i.e. one wafer stage, is disposed in each lithographic apparatus. Preparations, such as leveling and focusing, are all implemented on the stage, which are time consuming. Particularly, alignment requires a very long time, since it needs low velocity scanning (typical alignment scanning velocity is 1 mm/s) with extremely high accuracy. It is very difficult to decrease the operation time. Therefore, in order to improve productivity of lithographic apparatus, movement velocity of wafer stages during stepping and exposure scanning must be increased. However, increased velocity would inevitably lead to deterioration of dynamic performance of the system, and a lot of technical measures should be adopted to ensure and enhance movement accuracy of wafer stages, which will incur a much higher cost for retaining existing accuracy or achieving higher accuracy.
Patent WO 98/40791 (published on Sep. 17, 1998, Netherlands) described a structure with two wafer stages in which exposure preparation works, such as wafer loading and unloading, pre-alignment and alignment, are transferred to a second wafer stage that moves simultaneously with and independently from the exposure stage. While movement velocity of wafer stages is not increased, substantial preparation works carried out on the exposure stage are now carried out on the second wafer stage, which significantly reduces operation time of each wafer on the exposure stage, greatly improving productivity. However, the system has a major drawback of non-centroid driving for the wafer stage system.
Patent of invention titled “Dual-stage exchange system for Lithographic apparatus” filed by the applicant of the present application in 2007 (Publication No.: CN101101454) disclosed a dual-stage exchange system for lithographic apparatus, which has advantages such as simple structure and high space utilization and thereby improving exposure efficiency of lithographic apparatus. However, this two-stage system still suffers some problems. First of all, use of air bearing structures entails micron scale or higher accuracy for component processing and assembling. Secondly, there is a rigid requirement for consistency between external dimensions of wafer stages. Thirdly, it is difficult to mount a sensor for detecting positions with respect to each other between guides involved in exchange, and upper linear guides tend to collide.